1. Technical Field
The present disclosure relates to the semiconductor memory device field. More specifically, the present invention relates to level shifters.
2. Description of the Related Art
Semiconductor memory devices are commonly used to store information (either temporarily or permanently) in a number of applications; particularly, in a non-volatile memory device the information is preserved even when a power supply is off. Typically, the memory device includes a matrix of memory cells that are arranged in a plurality of rows (connected to corresponding word lines) and in a plurality of columns (connected to corresponding bit lines).
For example, an ovonic or phase-change memory (PCM) is a non-volatile memory exploiting the properties of a material that can be reversibly switched between an amorphous phase and a crystalline phase, such as a chalcogenide alloy. A PCM could be characterized as an E2PROM because it is non-volatile and electrically alterable. The phase-change material exhibits different electrical characteristics depending on its phase, each one representing a corresponding logic value. An example of a phase-change memory is described in U.S. Pat. No. 5,166,758.
In order to retrieve and/or store information, the phase-change memory device includes a decoding system that is configured to decode an addressing code identifying a group of memory cells. Based on the decoded addressing code, the decoding system drives a selection system, which accordingly selects the identified memory cells for performing a programming or a reading operation. In particular, the selection system includes a row selector for selecting a corresponding word line and a column selector for selecting a corresponding set of bit lines. Particularly, the column selector includes a plurality of controllable switching elements each for selectively connecting a corresponding bit line to a read and write circuit, configured to bias said bit line with a voltage whose value depends on the operation to be performed.
The decoder system operates with logical signals at low voltages, of the order of a supply voltage of the phase-change memory device; for example, the logical signals can take two values equal to a reference voltage (0) or to the supply voltage (1).
To generate sufficient heat to convert the phase change material between amorphous and crystalline states, the selection system is able to apply operative voltages of high value to the selected memory cells. These voltages are higher than the supply voltage (in absolute value). For example, in single supply voltage memory devices, the high voltages are generated inside the phase-change memory device from the supply voltage, by means of suitable circuits, such as charge pumps. Thus, the selection system usually includes level shifters, which are configured to convert logical signals output from the decoding system into the high voltages necessary during the programming and erasing operations. For example, during a programming operation, for selecting a set of bit lines and connecting them to the read and write circuits, the switching elements of the column selector are controlled with high voltages, so as to allow the read and write circuits to bias the selected bit lines with the voltages higher than the supply voltage; for this purpose, each switching element is controlled by a respective level shifter, which is configured to shift the logic signals provided by the decoding system to a level suitable for activating the switching element.
Therefore, the components forming said level shifter, such as MOS transistors, have to sustain between their terminals high voltage differences, that exceed the value of the supply voltage.
As is well known to those skilled in the art, if a MOS transistor is subjected to high gate-to-source and/or gate-to-drain voltage differences, its operative life is heavily shortened, since the oxide gate experiences an excessive stress. This excessive stress may cause the oxide gate to break, impairing the correct functioning of the level shifters and, thus, of the whole memory device.